CSRForge
One validated register specification. Consistent outputs for design, verification, software, and documentation.
Spend less time synchronising and more time engineering.
Stop maintaining the same register definition in multiple places.
Register information is often duplicated across spreadsheets, RTL, verification models, software headers, documentation, and internal scripts.
Every copy creates another opportunity for values, offsets, access permissions, and descriptions to drift out of sync.
CSRForge replaces those disconnected sources with one authoritative model. Import your existing register data, validate it centrally, manage variants without duplicating specifications, and regenerate every downstream artefact when the model changes.
The result is less manual reconciliation, fewer integration errors, and greater confidence that every team is working from the same definition.
One Trusted Specification
Reduce Manual Synchronisation
Automate Release Outputs
Keep Teams Aligned
Catch Problems Earlier
Reuse Existing Data
Features
Multi-Mode Specifications
Represent product variants, port configurations, address maps, and operating modes as controlled overrides on one shared model.
Comprehensive Validation
Check field overlaps, address conflicts, alignment, byte and bit gaps, duplicate names, reset values, and required attributes.
Broad Format Support
Import and export Excel, CSV, and IP-XACT while preserving the complete source model in the FCX format.
Multi-Discipline Generation
Generate System
Verilog RTL, UVM RAL, verification classes, DPI accessors, C headers, memory maps, HTML, and PDF documentation.
Templates and CI Automation
Create proprietary output formats with configurable templates and run repeatable generation from command-line build pipelines.
Flexible Register Modelling
Define registers, fields, custom schema columns, rich descriptions, repeated arrays, and interleaved address layouts.
How it works
1. Import or create your model
Start with an existing Excel, CSV, or IP-XACT register map, or create a new FCX model.
2. Define your specification
Maintain registers, fields, offsets, access permissions, reset values, descriptions, custom attributes, and array structures.
3. Model product variants
Use modes to represent different devices, ports, address maps, or operating states without maintaining separate specifications.
4. Validate continuously
Identify structural errors, missing required data, overlaps, gaps, conflicts, and mode-specific issues before they spread downstream.
5. Generate every output
Produce consistent design, verification, software, documentation, and custom deliverables from the same validated model.
Download CSRForge
Free to try. Please contact us to discuss the best licensing for your situation.
Note: by downloading and using this software you are agreeing to these Terms and Conditions.
| Platform | Download |
|---|---|
| Linux x64 | linux_x64_current.tar.gz |
| Linux ARM | linux_arm_current.tar.gz |
| MacOS Apple Silicon | macos_arm_current.dmg |
| Windows x64 | windows_x64_current.exe |
| Windows ARM | windows_arm_current.exe |
Get the latest insights on streamlining your work.
Sign up for the latest news on our products, and discover new ways to streamline your verification work.
Contact our team
+1 (408) 357-0421 (Pacific)
2150 N First St, #400, San Jose CA 95131
